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ECSE 425 Computer Architecture (3 credits)

Minerva Class Scheduling Visit Minerva > Student > Registration > Class Schedule for course dates & times.

Offered by: Electrical & Computer Engr (Faculty of Engineering)

Overview

Electrical Engineering : Trends in technology. CISC vs. RISC architectures. Pipelining. Instruction level parallelism. Data and Control Hazards. Static prediction. Exceptions. Dependencies. Loop level paralleism. Dynamic scheduling, branch prediction. Branch target buffers. Superscalar and N-issue machines. VLIW. ILP techniques. Cache analysis and design. Interleaved and virtual memory. TLB translations and caches.

Terms: Winter 2024

Instructors: Emad, Amin (Winter)

  • (3-1-5)

  • Prerequisites: ECSE 324

  • Tutorials assigned by instructor.

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